This application is related to Japanese Patent Applications No. 2003-88671, filed on Mar. 27, 2003, whose priority is claimed under 35 USC xc2xa7119, the disclosure of which is incorporated by reference in their entirety.
1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, it relates to a semiconductor device and a manufacturing method thereof which can be used as an input/output protection circuit for preventing an electrostatic breakdown.
2. Description of Related Art
Conventionally, in order to prevent an electrostatic breakdown of the semiconductor device, a protection circuit using a diode is provided to each input/output terminal of a semiconductor device. An example of conventional protection circuits is shown in FIG. 8. This protection circuit has a diode D in parallel to a gate electrode G of a transistor connected to an input terminal. A breakdown voltage of the diode D is set lower than a gate destruction voltage so that a destruction current applied from the input terminal is fed to the diode D but not to the gate electrode G for protection of the gate electrode G.
A breakdown current path 6 of a conventional diode manufactured by a well-known planar technique is shown in FIG. 9. In this figure, a breakdown current flow is localized in a curvature 5 (a region inside a dotted circle) at which a p-n junction is present. The above-mentioned phenomenon is caused by the fact that the field intensity is high at the p-n curvature 5, so that the p-n curvature 5 is lower than a bottom portion 7 in breakdown voltage. In this diode where the breakdown current flows in the small region inside a dotted circle, to increase the breakdown current, it is necessary to increase the area of the protection circuit itself and thereby increase the area of a chip.
Recently, the reduction in chip area has been progressed in accordance with the improvements in the techniques for manufacturing the semiconductor device, and the area of the protection circuit has been forming an increasing proportion of a total area of the semiconductor device (chip area). Moreover, since a protection circuit is generally provided for each input/output terminal, the number of the input/output terminals increases as the semiconductor device becomes more advanced, and the area of the protection circuit becomes increasingly larger. Thus, the need was felt to reduce the area of the protection circuit in order to reduce the chip area.
To meet this demand, a gate protection diode in which the breakdown current flows through a bottom portion of a p-n junction has been proposed (Japanese Unexamined Patent Publication No. SHO 61-35568).
FIG. 10 shows a breakdown current path of a diode shown in the above-mentioned patent publication. In this prior art, the breakdown voltage of a bottom portion 15 is set lower than that of the p-n junction curvature 5 by setting an impurity concentration of the p-n junction bottom portion 15 locally higher than that of a p-n junction curvature 5 by single or double figures so that the breakdown current flows through a large area portion of the junction bottom portion 15.
However, such a conventional manufacturing method as described in the above-mentioned patent publication has a problem that a large breakdown current can not flow since a resistance value of a P-type semiconductor region under an anode electrode 11 is high.
The present invention is to provide a semiconductor device and a manufacturing method thereof which allows a large breakdown current to flow by setting an impurity concentration of a P-type semiconductor under an anode electrode high and thereby decreasing a resistance value of the same portion.
In a first aspect, the present invention provides a semiconductor device comprising: a semiconductor substrate of a first conductivity, a first electrode formation region and a second electrode formation region formed adjacent to an inner surface of the semiconductor substrate, wherein the first electrode formation regions and the second electrode formation regions are isolated from each other via an element isolation region, in one of the first electrode formation region and the second electrode formation region an upper first-type impurity layer and a lower first-type impurity layer are formed, the lower first-type impurity layer has a different first-type impurity concentration from the upper first-type impurity layer and is formed under the upper first-type impurity layer, in the other electrode formation region a second-type impurity layer and a first-type impurity layer are formed and the first-type impurity layer is formed under a part of the second-type impurity layer having second-type impurities.
According to this aspect of the present invention, the large breakdown current can flow between the first electrode formation region and the second electrode formation region since a portion having a high impurity concentration is formed in the first electrode formation region. Therefore, when the semiconductor device of the present invention is used as a protection circuit, the protection circuit of the present invention can be smaller than the conventional protection circuits in area.